BSEE / MSEE in Electrical engineering -is required
Above 6 years of DFT experienced from VLSI companies
Strong knowledge in DFT techniques for high performance SoC
Experience in industrial ATPG tools, Verilog simulation and scan debug tools
Experience in memory BIST and JTAG interfaces – Advantage
Strong understanding in Logic Design, Verilog (RTL and GLV), verification, and static timing analysis
Experience in silicon bring-up, debug, and validation of DFT features
לוח משרות
Senior DFT Engineer
מס' המשרה: 6611
מיקום המשרה: השרון
As a DFT engineer owning the complete DFT solutions in a chip design, you will have responsibilities spanning all aspects of chip design
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