3-5 Years in Logic Design/Verification
Advantage for experienced verification engineer
Advantage for DFT verification / design engineer
Good capabilities in SW programming, knowledge in C/C++ language – an advantage
Experience with Verilog/VHDL development language – an advantage
לוח משרות
Verification Design Engineer
מס' המשרה: 6087
מיקום המשרה: השרון, חיפה והצפון
Working with commercial Electronic Design Automation vendors and Tools.
Develop and implement the production related workflow and infrastructure.
Develop and implement the production related workflow and infrastructure.
דרישות: